Innsbruck, 13.05.2025. We’re pleased to announce a significant step forward in quantum error correction by the teams at ParityQC and the University of Innsbruck: a novel two-step decoder that achieves optimal accuracy and high-speed performance. The findings are outlined in the new publication “Optimal Decoder for the Error Correcting Parity Code”.
The inherent fragility of quantum information renders quantum algorithms particularly vulnerable to noise. To address this challenge, quantum error correction plays a crucial role in building scalable and fault-tolerant quantum computers. Designing fault-tolerant architectures requires tight integration with classical co-processors and algorithms capable of decoding quantum error correction measurements in real time. Generally, enhancing decoding performance entails greater computational complexity, so a practical decoder must strike a balance between speed and accuracy. Our newly developed Parity Decoder achieves impressive performance in both metrics, bringing the fault-tolerant ParityQC Architecture one step closer to practical feasibility.
The ParityQC Architecture
The ParityQC Architecture is designed to work efficiently within the physical constraints of planar quantum hardware. It supports long-range logical operations using only local, nearest-neighbor interactions, making it ideal for executing quantum algorithms on planar hardware systems with restricted qubit connectivity. As an instance of LDPC codes, it provides intrinsic protection against one type of quantum noise—e.g., bit-flip or phase-flip— enabling efficient fault-tolerant quantum computation in biased-noise systems, such as those based on bosonic cat qubits. The combination of efficient long-range logical gates (suitable for planar implementation) and built-in error correcting capabilities position the ParityQC Architecture as a promising candidate for demonstrating quantum advantage on qubit platforms with strong noise bias.
Error correcting codes have to be designed in conjunction with quantum decoders–algorithms capable of resolving information about location and type of errors affecting the qubits. To be practical, decoders must operate quickly and accurately to correct errors before they accumulate, as well as to avoid the backlog problem. However, finding the optimal correction is typically computationally hard for large codes. This forces a trade-off between speed and performance. Yet, the novel Parity Decoder presented by our team manages to overcome the trade-off, improving both accuracy and runtime.
The novel Parity Decoder: fast and accurate
ParityQC, in collaboration with the University of Innsbruck, recently published a paper that tackles the decoding complexity issue. In the pre-print “Optimal Decoder for the Error Correcting Parity Code” we introduce a two-step decoder for the Parity Code that enhances the reliability of quantum computations in systems with strong noise bias. The key achievement is that the decoder is simultaneously fast and accurate. In fact, as accurate as any decoder can possibly be, as the authors prove the decoder’s optimality in the regime of large codes. Furthermore, owing to the parallelizability and efficient post-processing, the decoder corrects errors in the Parity Code in approximately the same time as is required for correcting a single repetition code of the same distance.
The decoder comprises two steps. In the first, or matching, step, a correction that returns the quantum state to the correct code space is found by using one of the variations of the matching algorithms. The efficiency of the Parity Decoder stems from the second, or post-processing, step, enabled by the statistical properties of the code. Such efficient post-processing allows to relax the stringent computational requirements on the matching step, making it more scalable. In particular, both steps of the decoder can be reduced to a series of repetition codes decodable in parallel, making the method remarkably fast. Furthermore, the same post-processing makes the decoder near-optimal for moderate code sizes, and optimal as we increase the code further. In the presence of noisy measurements, the decoder retains the same structure of independent repetition codes and achieves a fault-tolerant threshold above 5%.
The availability of such a high-performance decoder further positions the ParityQC Architecture as a solid candidate for achieving fault tolerance on qubit platforms with strong noise bias.
Publication:
Konstantin Tiurev, Christophe Goeller, Leo Stenzel, Paul Schnabl, Anette Messinger, Michael Fellner, Wolfgang Lechner. “Optimal Decoder for the Error Correcting Parity Code”. arXiv:2505.05210 (2025)
