Innsbruck, 15 September 2026. ParityQC, the Quantum Architecture Company, today launched the Parity Twine Optimizer, making its compiler(1) technology, which led to record-setting performance in executing the Quantum Fourier Transform, available as a product. Built on the ParityQC Architecture, it delivers uniquely efficient compilation and is now available via the IBM Qiskit Function, including a free trial upon request, giving developers and enterprises an easy way to put a clear technological head toward solving complex optimization problems.
Applying QFT-record compilation to optimization on other paradigms.
The Parity Twine Optimizer makes efficient compilation a reality: ParityQC’s Parity Twine Compilation has shown in published results that it delivers a significant reduction of gate count and depth in quantum optimization. It supports running larger and denser problems on real hardware today. It reduces the two-qubit gate overhead of compiling industry-relevant optimization problems, making larger and denser instances to be executed on today’s quantum hardware. The advantage is rooted in the structure of the Parity encoding itself rather than case-by-case tuning, so it holds across problem types and stays consistent as problems grow larger and more connected.
The Parity Twine Optimizer is available now in the IBM Qiskit Functions Catalog, offered to IBM Quantum Network members through a 30-day free trial. It meets users where they already work: anyone in the IBM Quantum Network can bring record-efficient compilation into their own optimization problems and test it on IBM’s quantum hardware, without changing their setup or committing upfront. Its underlying compiler is hardware independent and available through ParityOS, ParityQC’s enabling software, and the technology will become accessible through further access routes in the future.
“By offering the Parity Twine Optimizer as an IBM Qiskit Function, we are providing the quantum community with access to a tool with what we currently show to be the most efficient quantum compiler available for larger and more connected problems to run on real hardware,” said Magdalena Hauser and Wolfgang Lechner, co-CEOs of ParityQC.
“Efficiency is paramount for useful results on today’s quantum computers. With ParityQC’s Parity Twine Optimizer now available in the IBM Qiskit Functions Catalog, our clients in the IBM Quantum Network have a new, powerful tool capable of scaling alongside the complex optimization problems they’re exploring,” said Scott Crowder, Vice President, IBM Quantum Adoption and Business Development.
Key features of the Parity Twine Compilation include: Compile your circuits with maximum efficiency and minimal overhead in two-qubit gates. Eliminate the need for costly SWAP operations with the unique Parity Twine technology and leverage the full potential of quantum hardware today.
- Run larger problems on real hardware: Minimizes circuit depth and two-qubit gate overhead, so larger optimization problems run efficiently on today’s quantum processors.
- Higher performance, lower compilation overhead: Built on the state-of-the-art Parity Twine compilation, it reduces gate count and circuit depth while preserving algorithm quality, for faster execution and lower error accumulation.
- Adaptive and hardware independent: Supports arbitrary problem graph connectivity and adapts to your target hardware topology, including both heavy-hex (such as IBM Heron) and square-lattice (such as IBM Nighthawk) IBM Quantum QPUs, generating connectivity-aware circuits tuned to the problem graph density.
- Efficient end-to-end optimization: Solves full optimization workflows seamlessly with minimal, predictable QPU usage as you scale.
About ParityQC
ParityQC, the quantum architecture company, has its focus on developing blueprints and enabling software for highly scalable quantum computers. The ParityQC Architecture solves fundamental limitations for scalability of quantum devices by a new paradigm which allows for fully programmable quantum chips with simplified design and control, as well as integrated error correction.
ParityQC collaborates with hardware partners all over the world to jointly build highly scalable quantum computers for applications ranging from solving optimization problems on NISQ devices to general-purpose, error-corrected quantum computing.
For more information, visit parityqc.com or follow ParityQC on LinkedIn.
Media Contact: Sinja Burgemeister, Communication & Marketing Manager, ParityQC, press@parityqc.com
1. Connectivity-aware Synthesis of Quantum Algorithms
